Single, low cost chip bridges PCI to parallel port

Oxford Semiconductor has introduced a low cost, single chip solution to bridge the PCI bus to an IEEE 1284 SPP/EPP/ECP parallel port.

Designed for PCI-based parallel expansion add-in cards, the OX12PCI840 features a parallel port that can be located at standard I/O addresses, making it ideal for legacy applications. The efficient 32bit, 33MHz target-only PCI interface is compliant with version 2.2 of the PCI Bus Specification and version 1.0 of the PCI Power Management Specification. For flexibility, the default register values can be overwritten and reconfigured using a MicrowireT serial EEPROM and two multi-purpose I/O pins can be configured as interrupt input pins.

The OX12PCI840 is configured by system start-up software during the bootstrap process that follows bus reset. They system scans the bus and reads the vendor and device identification codes from any devices it finds and then loads device driver software according to this information and configures the I/O, memory and interrupt resources. Device drivers can then access the functions at the assigned addresses in the usual fashion, with improved data throughput provided by PCI.

A set of Local configuration registers can be used to enable signals and interrupts, and configure timings. These can be set up by drivers or from the EEPROM. All registers default to suitable values for typical applications after reset. However, all identification, control and timing registers can be redefined using an optional serial EEROM. As an additional enhancement, the EEPROM can be used to program the parallel port, allowing pre-configuration without driver changes.

The OX12PCI840 is a 5.0V device in a 100 pin PQFP package. It costs 5 USD in 10,000+ quantities. Samples are available now and production quantities will be shipping in June 2000.